Table MIB

compat debug dev hw kern machdep net p1003_1b security sys sysctl user vfs vm

Name	Description	Type	Format	Flags	Handler	OID
machdep	machine dependent	node	N	RD, WR, MPSAFE	Undefined	7
machdep.acpi_root	The physical address of the RSDP	unsigned long	LU	RD, MPSAFE	Defined	7. [dyn]
machdep.acpi_timer_freq	ACPI timer frequency	integer	I	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.adjkerntz	Local offset from UTC in seconds	integer	I	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.atrtc_power_lost	RTC lost power on last power cycle (probably caused by an empty cmos battery)	uint8_t	CU	RD, MPSAFE	Defined	7. [dyn]
machdep.bootmethod	System firmware boot method	string	A	RD, MPSAFE	Defined	7. [dyn]
machdep.disable_msix_migration	Disable migration of MSI-X interrupts between CPUs	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.disable_mtrrs	Disable MTRRs.	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.disable_rtc_set	Disallow adjusting time-of-day clock	integer	I	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.disable_tsc	Disable x86 Time Stamp Counter	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.disable_tsc_calibration	Disable early TSC frequency calibration	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.dump_retry_count	Number of times dump has to retry before bailing out	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.efi_arch	EFI Firmware Architecture	string	A	RD, MPSAFE	Defined	7. [dyn]
machdep.efi_map	Raw EFI Memory Map	opaque	S,efi_map_header	RD, MPSAFE	Defined	7. [dyn]
machdep.efi_rt_handle_faults	Call EFI RT methods with fault handler wrapper around	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.enable_panic_key	Enable panic via keypress specified in kbdmap(5)	integer	I	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.first_msi_irq	Number of first IRQ reserved for MSI and MSI-X interrupts	unsigned integer	IU	RD, MPSAFE	Defined	7. [dyn]
machdep.hwpstate_pkg_ctrl	Set 1 (default) to enable package-level control, 0 to disable	uint8_t	CU	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.hyperthreading_allowed	Use Intel HTT logical CPUs	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.hyperthreading_intr_allowed	Allow interrupts on HTT logical CPUs	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.i8254_freq	i8254 timer frequency	integer	IU	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.idle	currently selected idle function	string	A	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.idle_apl31	Apollo Lake APL31 MWAIT bug workaround	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.idle_available	list of available idle functions	string	A	RD, MPSAFE	Defined	7. [dyn]
machdep.idle_mwait	Use MONITOR/MWAIT for short idle	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.intr_apic_id_limit	Maximum permitted APIC ID for interrupt delivery (-1 is unlimited)	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.max_ldt_segment	Maximum number of allowed LDT segments in the single address space	integer	I	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.mitigations	Machine dependent platform mitigations.	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]
machdep.mitigations.flush_rsb_ctxsw	Flush Return Stack Buffer on context switch	integer	I	RD, WR, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]
machdep.mitigations.ibrs	Indirect Branch Restricted Speculation active	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]. [dyn]
machdep.mitigations.ibrs.active	Indirect Branch Restricted Speculation active	integer	I	RD, MPSAFE	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.ibrs.disable	Disable Indirect Branch Restricted Speculation	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.mds	Microarchitectural Data Sampling Mitigation state	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]. [dyn]
machdep.mitigations.mds.disable	Microarchitectural Data Sampling Mitigation (0 - off, 1 - on VERW, 2 - on SW, 3 - on AUTO)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.mds.state	Microarchitectural Data Sampling Mitigation state	string	A	RD, MPSAFE	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.rngds	MCU Optimization, disable RDSEED mitigation	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]. [dyn]
machdep.mitigations.rngds.enable	MCU Optimization, disabling RDSEED mitigation control (0 - mitigation disabled (RDSEED optimized), 1 - mitigation enabled)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.rngds.state	MCU Optimization state	string	A	RD, MPSAFE	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.ssb	Speculative Store Bypass Disable active	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]. [dyn]
machdep.mitigations.ssb.active	Speculative Store Bypass Disable active	integer	I	RD, MPSAFE	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.ssb.disable	Speculative Store Bypass Disable (0 - off, 1 - on, 2 - auto)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.taa	TSX Asynchronous Abort Mitigation	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]. [dyn]
machdep.mitigations.taa.enable	TAA Mitigation enablement control (0 - off, 1 - disable TSX, 2 - VERW, 3 - on AUTO)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.taa.state	TAA Mitigation state	string	A	RD, MPSAFE	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.zenbleed	Zenbleed OS-triggered prevention (via chicken bit)	node	N	RD, WR, MPSAFE	Undefined	7. [dyn]. [dyn]
machdep.mitigations.zenbleed.enable	Enable Zenbleed OS-triggered mitigation (chicken bit) (0: Force disable, 1: Force enable, 2: Automatic determination)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mitigations.zenbleed.state	Zenbleed OS-triggered mitigation (chicken bit) state	string	A	RD, MPSAFE	Defined	7. [dyn]. [dyn]. [dyn]
machdep.mwait_cpustop_broken	Can not reliably wake MONITOR/MWAIT cpus without interrupts	uint8_t	CU	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.nkpt	Number of kernel page table pages allocated on bootup	integer	I	RD, MPSAFE	Defined	7. [dyn]
machdep.nmi_flush_l1d_sw	Flush L1 Data Cache on NMI exit, software bhyve L1TF mitigation assist	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.nmi_is_broadcast	Chipset NMI is broadcast	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.num_msi_irqs	Number of IRQs reserved for MSI and MSI-X interrupts	unsigned integer	IU	RD, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.panic_on_nmi	Panic on NMI: 1 = H/W failure; 2 = unknown; 0xff = all	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.prot_fault_translation	Control signal to deliver on protection fault	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.rtc_save_period	Save system time to RTC with this period (in seconds)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.smap	Raw BIOS SMAP data	opaque	S,bios_smap_xattr	RD, MPSAFE	Defined	7. [dyn]
machdep.stop_mwait	Use MONITOR/MWAIT when stopping CPU, if available	uint8_t	CU	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.syscall_ret_flush_l1d	Flush L1D on syscall return with error (0 - off, 1 - on, 2 - use hw only, 3 - use sw only)	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.tsc_freq	Time Stamp Counter frequency	uint64_t	QU	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.uprintf_signal	Print debugging information on trap signal to ctty	integer	I	RD, WR, TUN, MPSAFE, NOFETCH	Defined	7. [dyn]
machdep.vga_aspect_scale	Aspect scale ratio (3:4):actual times 100	integer	I	RD, WR, MPSAFE	Defined	7. [dyn]
machdep.wall_cmos_clock	Enables application of machdep.adjkerntz	integer	I	RD, WR, MPSAFE	Defined	7. [dyn]